Aim
To correlate the characteristics of nanoscale crystals in a NAND memory device with device performance.
Challenge
In order to analyse NAND device crystal properties, we need to measure crystallographic domains of 50 nm or less.
Solution
Electron Backscatter Diffraction (EBSD) in a Scanning Electron Microscope provides the necessary information, however, the spatial resolution of the technique on a conventional bulk sample is on the order of 50–100 nm. In contrast, the TKD method (which performs EBSD on an electron transparent sample) using a Symmetry CMOS detector can provide enhanced sub-10 nm spatial resolution.
Results
The results shown in Figure 1 highlight the polycrystalline nature of the tungsten grains in this NAND device, with a 10–50 nm grain size. The orientation maps (using an inverse pole figure colouring scheme) indicate a random texture of the Si grains and a weak texture in the W grains, with the [110] directions parallel to the surface normal.

Figure 1. Shows the 30 min TKD acquisition results for a 3D NAND flash memory device (approx. 30 nm film thickness): a) Band Contrast Map; b) Phase map showing the distribution of Si (red) and W (blue) phases across the device; c) and d) orientation maps for the poly-Si channel and the surrounding W area, respectively.
Conclusion
The data from TKD analyses permit the correlation of crystallographic properties with expected device performance characteristics in NAND devices. The current conduction in the device depends on the grain size, boundary characteristics and the crystal orientations. For example, the device performance tends to degrade with an increasing number of grains, whilst a [100] Si channel orientation may be favourable for high carrier mobility. Also, further degradation of the device performance is expected due to grain boundary traps in the channel region. These will obstruct the flow of charge carriers from one grain to the other. The power of the TKD method is its ability to analyse high-resolution semiconductor structures of 50 nm or less, enabling further understanding and optimisation of the final device properties.
If you would like to learn more about the EBSD technique, visit www.ebsd.com.
Acknowledgement
Hiroyuki Ito and Yasushi Kuroda, Hitachi Japan.